New to Berkeley Lab Computing Sciences Team
October 31, 2012
Daniel Burke, Computer Architecture Lab Project Manager
This month, Daniel Burke joins Berkeley Lab's Computational Research Division as a project manager for the new Computer Architecture Lab. He will be working closely with John Shalf, to explore low-energy approaches for the Department of Energy's Exascale Computing Initiative.
Although Burke's career at Berkeley Lab began only recently, he is no stranger to the Lab environment. Since 2006, he has collaborated with Shalf and other CRD researchers on a number of projects, including RAMP and GreenFlash, which evolved into the Exascale Computing Initiative.
"About 15 years ago, I made a conscious decision to pursue high-performance computing and relocated to the University of Illinois where I was Technical Project Manager of several programs at the Center for Reliable and High-Performance Computing (CRHC) and National Center for Supercomputing Applications (NCSA)," says Burke.
Before that, he worked primarily on physics instrumentation at California Institute of Technology (Caltech). Initially targeting spacecraft sensors on joint NASA/JPL projects. Over time, this thrust evolved toward data acquisition and real-time data processing, which in turn led to designing purpose-built processing platforms in support of accelerator efforts both locally and abroad. In Illinois, he participated in the Gigascale Systems Research Center, which was a broad effort by many institutions, including UC Berkeley. This work required him to co-locate to the Bay Area, where he eventually settled.
A native of Northeast Texas, Burke earned his undergraduate degree in Physics and Math from Texas A&M University; and a Masters in Computer Engineering from the University of Illinois at Urbana-Champaign. An avid sailor, Burke savors every opportunity to get out on the water. He also looks forward to following the upcoming America's Cup competitions.
George Michelogiannakis, Postdoc, Future Technologies Group
As the newest postdoctoral researcher in the Computational Research Division's Future Technologies Group, George Michelogiannakis will be working on computer hardware architectures for future large-scale chips, each of which will contain thousands of processing cores.
"You can call these mini supercomputers-on-a-chip," says Michelogiannakis. "This study will include many variables, such as the on-chip network, the memory hierarchy, processing core design, and co-design (synergy) with the software such as compilers and programmers."
He earned his bachelor's and master's degrees in computer science at the University of Crete. Shortly after, he relocated to Palo Alto, Calif. to complete a doctorate in electrical engineering at Stanford University. Michelogiannakis' thesis work focused on on-chip networks, with contributions on flow control, routing and allocation. He also did some research on off-chip datacenter networks.
"Computers just always made sense to me, so I always wanted to learn more,” says Michelogiannakis. “This is still going on."
In addition to his day job at Berkeley Lab, Michelogiannakis is also a certified flight instructor. In his spare time, he enjoys flying and teaching others to fly. He also like to play soccer, hike and read.